1. Field of the Invention
This invention relates to microcontrollers, and more specifically, to a microcontroller having automatic parity checking capabilities in an asynchronous serial port.
2. Description of the Related Art
Specialized microcontrollers with integrated communication features are becoming particularly attractive for communications applications. A microcontroller, or an embedded controller, is uniquely suited to combining functionality onto one monolithic semiconductor substrate (i.e. chip). By embedding various communication features within a single chip, a communications microcontroller may support a wide range of communication applications.
Microcontrollers have been used for many years in many applications. A number of these applications involve communications over electronic networks, such as telephone lines, computer networks, and local and wide area networks, in both digital and analog formats. In communications applications, a microcontroller generally has a number of integrated communications peripherals in addition to the execution unit. These can be low and high speed serial ports, as well as more sophisticated communications peripherals, such as a universal serial bus (USB) interface, and high level data link control (HDLC) channels.
An asynchronous serial communications port is one such common additional feature in a microcontroller. An asynchronous serial link allows the microcontroller to communicate with other devices or over data lines by sequentially sending and receiving bits of data. The "asynchronous" nature indicates these ports do not provide a separate clock signal to clock the data. Instead, the rate at which data is sent and received must be predetermined or prenegotiated, and independently controlled on both the sending and receiving ends. This data rate is known as the baud rate, which is the inverse of one bit period. The baud rate is generally one of a number of predefined rates, which are standard within the industry. Such rates include 1200, 2400, 4800, 9600, 19.2K, 28.8K, 33.3K, and 54K baud and high data transfer rates.
Due to the prevalence of serial data communication, many microcontrollers include one or more asynchronous serial ports (ASPs) which can transmit and receive data one bit at a time. Such microcontrollers typically employ interrupt signals to notify the microprocessor core that an ASP requires service. An ASP typically issues an interrupt request signal when a data unit has been received by the ASP and needs to be transferred from the ASP to an external memory unit, when the ASP is finished transmitting a data unit and the next data unit to be transmitted must be transferred from the external memory unit to the ASP, or when an error occurs.
Error checking is a primary concern with serial data communication. If a signal has errors when received, the ASP needs to be able to detect such errors and request retransmission. Parity checking has long been utilized as a basic form of such error detection. Parity may be used in a number of ways, although primarily either an odd or an even configuration is employed. The transmitter and the receiver agree that parity checking is enabled and on the specific type of parity to be used. With parity enabled, a parity bit is included in every transmitted data frame. The value of the parity bit is set so that all data bytes, including the data bits and the parity bit, have either an odd number or an even number of set bits, depending on the parity configuration used.
An ASP can be configured for a variety of data formats, although historically seven or eight data bits are typical values. A number of nine-bit serial protocols, however, have been developed using microcontrollers. These protocols are described in the Am 186ES Users Manual and Am 186ED Users Manual, both by Advanced Micro Devices, Inc. of Sunnyvale, Calif. As described in that documentation, and as discussed below, a separate control bit is set or reset to act as the ninth data bit during transmission and reception of data. This ninth "data" bit is employed as an address bit, particularly useful in multi-drop protocols.
In protocols using an address bit, the address bit is typically transmitted as the last data bit. However, this configuration has complicated automatic parity generation and detection. Previously, therefore, parity support could only be provided through dedicated software routines which were able to skip or ignore the presence of the address bit. The utility of such software has been dependent on the number of bits in the frame. Furthermore, in systems supporting parity through software, interrupts could not be generated off the parity bit.